1. Field of the Invention
The invention relates to communications between integrated circuits and more specifically to data transfer and coherency in a multi-node or multi-processor system.
2. Description of the Related Art
Processors and caches have existed since shortly after the advent of the computer. However, the move to using multiple processors has posed new challenges. Previously, data existed in one place (memory for example) and might be copied into one other place (a cache for example). Keeping data coherent between the two possible locations for the data was a relatively simple problem. Utilizing multiple processors, multiple caches may exist, and each may have a copy of a piece of data. Alternatively, a single processor may have a copy of a piece of data which it needs to use exclusively.
If two copies of the data exist, or one copy exists aside from the original, some potential for a conflict in data exists in a multi-processor system. For example, a first processor with exclusive use of a piece of data may modify that data, and subsequently a second processor may request a copy of the piece of data from memory. If the first processor is about to write the piece of data back to memory when the second processor requests the piece of data, stale data may be read from memory, or corrupted data may be read from the write. The stale data results when the write should have completed before the read completed (but did not), thus allowing the read instruction to cause retrieval of the updated data. The corrupted data may result when the read should have completed before the write completed (but did not), thus allowing the read instruction to cause retrieval of the data prior to the update.